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    Updating I/O capability of a logically-partitioned computer system
    2.
    发明授权
    Updating I/O capability of a logically-partitioned computer system 有权
    更新逻辑分区计算机系统的I / O功能

    公开(公告)号：US08112561B2

    公开(公告)日：2012-02-07

    申请号：US11967141

    申请日：2007-12-29

    申请人： David Charles Boutcher ,  Charles Scott Graham ,  Harvey Gene Kiel ,  Chetan Mehta ,  Jaya Srikrishnan

    发明人： David Charles Boutcher ,  Charles Scott Graham ,  Harvey Gene Kiel ,  Chetan Mehta ,  Jaya Srikrishnan

    IPC分类号： G06F3/00 ,  G06F13/12 ,  G06F9/00

    CPC分类号： G06F9/5077 ,  G06F8/656

    摘要： A hosting partition update mechanism allows updating I/O capability of a logically-partitioned computer system in a way that minimally affects the performance and availability of I/O in the computer system. When an update is needed, a new hosting partition is created with the desired update(s). I/O adapters in the current hosting partition are then migrated to the new hosting partition. The migration of an I/O adapter from the current hosting partition to the new hosting partition is relatively fast, thereby minimally impacting system performance and availability of I/O. Once all of the I/O adapters have been migrated to the new hosting partition, the current hosting partition may be kept as a backup, or may be eliminated. Providing a new or backup hosting partition allows updates to be performed in the new or backup hosting partition in a non-disruptive manner while the current hosting partition continues to service I/O requests.

    摘要翻译： 托管分区更新机制允许以最小程度上影响计算机系统中I / O性能和可用性的方式更新逻辑分区计算机系统的I / O能力。 当需要更新时，将创建一个新的托管分区，并具有所需的更新。 当前主机分区中的I / O适配器随后被迁移到新的主机分区。 将I / O适配器从当前主机分区迁移到新的主机分区相对较快，从而最小程度上影响了系统性能和I / O的可用性。 一旦所有的I / O适配器都已经迁移到新的主机分区，当前的主机分区可能会保留作为备份，或者可能被删除。 提供新的或备份的主机分区允许在新的或备份主机分区中以不间断的方式执行更新，同时当前的主机分区继续维护I / O请求。

    Method of mapping multiple address spaces into single PCI bus
    3.
    发明授权
    Method of mapping multiple address spaces into single PCI bus 失效
    将多个地址空间映射到单个PCI总线的方法

    公开(公告)号：US06721839B1

    公开(公告)日：2004-04-13

    申请号：US09748983

    申请日：2000-12-27

    申请人： Ellen Marie Bauman ,  David Lee Dosch ,  Charles Scott Graham ,  Brian Gerard Holthaus ,  Daniel Robert Lipps ,  Daniel Frank Moertl ,  Paul Edward Movall ,  Daniel Paul Wetzel

    发明人： Ellen Marie Bauman ,  David Lee Dosch ,  Charles Scott Graham ,  Brian Gerard Holthaus ,  Daniel Robert Lipps ,  Daniel Frank Moertl ,  Paul Edward Movall ,  Daniel Paul Wetzel

    IPC分类号： G06F1300

    CPC分类号： G06F13/404

    摘要： A method and apparatus are provided for mapping multiple address spaces into a single bus, such as a single peripheral component interconnect (PCI) bus. The single bus is coupled to a first processor complex and a second processor complex. An original address of a memory access is shifted to a unique address space for each originator/target of an operation. The shifted address is used on the single bus. Then the shifted address is shifted back to the original address for completing the operation on a destination bus. The original address of a memory access is shifted to a unique address space for each originator/target of an operation using a respective predefined value (+X1, +X2, or +X3) for shifting the original address above a predefined boundary for each originator/target of the operation. Shifting back the shifted address to the original address for completing the operation on the destination bus uses a respective predefined value (−X1, −X2, or −X3) for the shifted back address to the original address for completing the operation on the destination bus. Using the shifted address on the single bus utilizes a dual address cycle (DAC) of the single bus for the shifted address. Completing the operation on a destination bus utilizes a single address cycle (SAC) of the destination bus for the shifted back address to the original address.

    摘要翻译： 提供了一种用于将多个地址空间映射到单个总线（诸如单个外围组件互连（PCI）总线）的方法和装置。 单总线耦合到第一处理器复合体和第二处理器复合体。 存储器访问的原始地址被移动到操作的每个发起者/目标的唯一地址空间。 移位的地址用于单总线。 然后将移位的地址移回原始地址，以完成目标总线上的操作。 使用相应的预定义值（+ X1，+ X2或+ X3）将存储器访问的原始地址移动到每个发起者/目标的唯一地址空间，用于将原始地址移动到每个发起者的预定边界之上 /目标的操作。 将移动的地址移动到原始地址以完成目的地总线上的操作，将移位后地址的相应预定义值（-X1，-X2或-X3）用于原始地址，以完成目标总线上的操作 。 使用单总线上的移位地址，可以使用单总线的双地址周期（DAC）作为移位地址。 在目的地总线上完成操作将目的地总线的单个地址周期（SAC）用于移位后地址到原始地址。

    Load/store assist engine
    4.
    发明授权
    Load/store assist engine 失效
    加载/存储辅助引擎

    公开(公告)号：US06219761B1

    公开(公告)日：2001-04-17

    申请号：US09072740

    申请日：1998-05-06

    申请人： Paul Edward Movall ,  Charles Scott Graham ,  Shawn Michael Lambeth ,  Daniel Frank Moertl

    发明人： Paul Edward Movall ,  Charles Scott Graham ,  Shawn Michael Lambeth ,  Daniel Frank Moertl

    IPC分类号： G06F1328

    CPC分类号： G06F13/126 ,  G06F9/3879

    摘要： An input/output bus architecture that includes: an input/output bus; an input/output device connected to the input/output bus; a main processor, connected to the input/output bus, for executing a device driver corresponding to the input/output device, the device driver generating load/store commands for the input/output device; and a load/store assist engine, connected to the input/output bus and yet independent of the main processor, for loading/storing data to/from the input/output device according to the load/store commands from the device driver. The load/store assist engine decouples the main processor from latencies associated with execution of the load/store commands. The device driver is reassigned to the main processor, rather than being found in a device that is external to the main processor, such as an input/output processor.

    摘要翻译： 输入/输出总线架构，包括：输入/输出总线; 连接到输入/输出总线的输入/输出设备; 连接到输入/输出总线的主处理器，用于执行与输入/输出设备相对应的设备驱动器，设备驱动器为输入/输出设备产生加载/存储命令; 以及负载/存储辅助引擎，其连接到输入/输出总线，并且独立于主处理器，用于根据来自设备驱动程序的加载/存储命令向/从输入/输出设备加载/存储数据。 加载/存储辅助引擎将主处理器与与执行加载/存储命令相关联的延迟分离。 设备驱动程序被重新分配给主处理器，而不是在主处理器外部的设备（例如输入/输出处理器）中找到。

    Method, Apparatus, and Computer Program Product for Implementing Infiniband Network Topology Simplification
    5.
    发明申请
    Method, Apparatus, and Computer Program Product for Implementing Infiniband Network Topology Simplification 审中-公开
    用于实现Infiniband网络拓扑简化的方法，设备和计算机程序产品

    公开(公告)号：US20080192654A1

    公开(公告)日：2008-08-14

    申请号：US11673028

    申请日：2007-02-09

    申请人： Timothy Roy Block ,  Charles Scott Graham ,  Kris Marie Kendall

    发明人： Timothy Roy Block ,  Charles Scott Graham ,  Kris Marie Kendall

    IPC分类号： H04L12/28

    CPC分类号： G06F13/387

    摘要： A method, apparatus and computer program product implement InfiniBand (IB) network topology simplification. A Subnet Manager (SM) of an IB subnet sends a subnet discovery request to each switch requesting the number of ports that are attached to the switch. Each of the switches and target channel adapters (TCAs) within the IB subnet includes a Subnet Management Agent (SMA). The Subnet Management Agent (SMA) of the receiving switch responds to the SM indicating a sufficient number of ports on the switch to support at least one port for each TCA. Each TCA supports at least two local IDs (LIDs).

    摘要翻译： 一种方法，设备和计算机程序产品实现InfiniBand（IB）网络拓扑简化。 IB子网的子网管理器（SM）向每个交换机发送子网发现请求，请求连接到交换机的端口数。 IB子网中的每个交换机和目标通道适配器（TCA）都包括子网管理代理（SMA）。 接收交换机的子网管理代理（SMA）响应SM指示交换机上的足够数量的端口，以支持每个TCA的至少一个端口。 每个TCA至少支持两个本地ID（LID）。

    Method and Apparatus for Device Discovery on an Infiniband Link in a Mixed Environment with Switches and Proprietary Devices
    6.
    发明申请
    Method and Apparatus for Device Discovery on an Infiniband Link in a Mixed Environment with Switches and Proprietary Devices 失效
    在与交换机和专有设备的混合环境中的Infiniband链路上的设备发现的方法和装置

    公开(公告)号：US20080144531A1

    公开(公告)日：2008-06-19

    申请号：US11610634

    申请日：2006-12-14

    申请人： Mark Edward Fisher ,  Charles Scott Graham ,  Thomas Rembert Sand

    发明人： Mark Edward Fisher ,  Charles Scott Graham ,  Thomas Rembert Sand

    IPC分类号： H04L12/28

    CPC分类号： C07K14/811 ,  A61K48/005 ,  A61K48/0075 ,  C07K14/71 ,  C12N2799/022 ,  H04L45/02 ,  H04L49/355 ,  H04L49/358

    摘要： Methods and systems for discovering and managing devices connected to InfiniBand ports are provided. The discovery may be performed by an end node, such that the end node interoperates with all standard InfiniBand components. Specific actions that are vendor unique, and potentially not compliant with the InfiniBand architecture, may not be done until after the discovery is complete and it has been verified that the noncompliant action will only be directed to entities known to be capable of processing them. These actions may include assuming the configuration responsibilities that would have been performed by the Subnet Manager in a standard InfiniBand network.

    摘要翻译： 提供了用于发现和管理连接到InfiniBand端口的设备的方法和系统。 发现可以由终端节点执行，使得终端节点与所有标准InfiniBand组件互操作。 供应商唯一的，可能不符合InfiniBand体系结构的具体操作可能不会在发现完成后才能完成，并且已经验证不合规的操作将仅针对已知能够处理它们的实体。 这些操作可能包括假定由Subnet Manager在标准InfiniBand网络中执行的配置职责。

    Method and apparatus for implementing infiniband receive function
    7.
    发明授权
    Method and apparatus for implementing infiniband receive function 有权
    用于实现infiniband接收功能的方法和装置

    公开(公告)号：US07225364B2

    公开(公告)日：2007-05-29

    申请号：US10388071

    申请日：2003-03-13

    申请人： Michael Joseph Carnevale ,  Charles Scott Graham ,  Daniel Frank Moertl ,  Timothy Jerry Schimke

    发明人： Michael Joseph Carnevale ,  Charles Scott Graham ,  Daniel Frank Moertl ,  Timothy Jerry Schimke

    IPC分类号： G06F11/00

    CPC分类号： G06F13/12

    摘要： A method, apparatus, and computer program product are provided for implementing a receive function over an interconnect network, such as InfiniBand. A virtual lane (VL) with a pending packet for a queue pair (QP) is selected. Then the pending packet is checked for an exceptional condition. Responsive to identifying the exceptional condition for the pending packet, a state bit is set for freezing the selected VL; and an interrupt is generated to firmware. Responsive to receiving the interrupt, the firmware determines a cause for freezing the selected VL and performs a responsive action. For example, the responsive action performed by firmware includes firmware performing an error recovery procedure (ERP) for the QP; firmware updating a state for the QP; or firmware performing application unique processing for the QP.

    摘要翻译： 提供了一种用于通过诸如InfiniBand的互连网络实现接收功能的方法，装置和计算机程序产品。 选择具有用于队列对（QP）的等待分组的虚拟通道（VL）。 然后检查待处理的数据包是否有特殊情况。 响应于识别待处理分组的异常情况，设置状态位以冻结所选择的VL; 并向固件生成中断。 响应于接收中断，固件确定冻结所选VL的原因并执行响应动作。 例如，由固件执行的响应动作包括执行QP的错误恢复过程（ERP）的固件; 固件更新QP的状态; 或执行针对QP的应用唯一处理的固件。

    Method and apparatus for implementing global to local queue pair translation
    8.
    发明授权
    Method and apparatus for implementing global to local queue pair translation 有权
    用于实现全局到本地队列对转换的方法和装置

    公开(公告)号：US07212547B2

    公开(公告)日：2007-05-01

    申请号：US10360252

    申请日：2003-02-06

    申请人： Michael Joseph Carnevale ,  Charles Scott Graham ,  Daniel Frank Moertl ,  Timothy Jerry Schimke

    发明人： Michael Joseph Carnevale ,  Charles Scott Graham ,  Daniel Frank Moertl ,  Timothy Jerry Schimke

    IPC分类号： H04J3/16 ,  H04J3/22

    CPC分类号： H04L49/90

    摘要： A method, apparatus, and computer program product are provided for implementing global to local queue pair translation in a network transport layer. A global queue pair number is identified. The global queue pair number is translated to a smaller local queue pair number. The local queue pair number is used for storing local queue pair context data for outbound header generation and inbound header checking. Upper layers of the network protocol above the network transport layer are allowed to use the global queue pair numbers.

    摘要翻译： 提供了一种用于在网络传输层中实现全局到本地队列对转换的方法，装置和计算机程序产品。 识别全局队列对号码。 全局队列对号被转换为较小的本地队列对。 本地队列对号用于存储用于出站报头生成和入站报头检查的本地队列对上下文数据。 允许网络传输层上方网络协议的上层使用全局队列对。

    Method and apparatus for implementing infiniband transmit queue
    9.
    发明授权
    Method and apparatus for implementing infiniband transmit queue 失效
    用于实现infiniband传输队列的方法和装置

    公开(公告)号：US07024613B2

    公开(公告)日：2006-04-04

    申请号：US10359777

    申请日：2003-02-06

    申请人： Michael Joseph Carnevale ,  Charles Scott Graham ,  Daniel Frank Moertl ,  Timothy Jerry Schimke

    发明人： Michael Joseph Carnevale ,  Charles Scott Graham ,  Daniel Frank Moertl ,  Timothy Jerry Schimke

    IPC分类号： G11C29/00 ,  H04L12/56

    CPC分类号： H04L49/901 ,  H04L49/90

    摘要： A method, apparatus and computer program product are provided for implementing a transmit queue. A queue pair context memory is provided for storing a set of pointers for each queue pair. The set of pointers are used to control the transmit queue for receiving, processing, and sending messages. Responsive to identifying an error for a queue pair, a limit pointer enable bit and a limit pointer to identify a last request for processing after the error are stored in the queue pair context memory for the queue pair.

    摘要翻译： 提供了一种实现发送队列的方法，装置和计算机程序产品。 提供队列对上下文存储器，用于存储每个队列对的一组指针。 指针集用于控制发送队列，用于接收，处理和发送消息。 响应于识别队列对的错误，限制指针使能位和限制指针，用于将错误后的最后一个处理请求标识存储在队列对的队列对上下文存储器中。