发明授权
US6096639A Method of forming a local interconnect by conductive layer patterning
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通过导电层图案形成局部互连的方法
- 专利标题: Method of forming a local interconnect by conductive layer patterning
- 专利标题(中): 通过导电层图案形成局部互连的方法
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申请号: US056835申请日: 1998-04-07
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公开(公告)号: US6096639A公开(公告)日: 2000-08-01
- 发明人: Robert Dawson , Mark I. Gardner , Frederick N. Hause , H. Jim Fulford, Jr. , Mark W. Michael , Bradley T. Moore , Derick J. Wristers
- 申请人: Robert Dawson , Mark I. Gardner , Frederick N. Hause , H. Jim Fulford, Jr. , Mark W. Michael , Bradley T. Moore , Derick J. Wristers
- 申请人地址: CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: CA Sunnyvale
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L21/4763
摘要:
A local interconnect (LI) structure is formed by forming a silicide layer in selected regions of a semiconductor structure then depositing an essentially uniform layer of transition or refractory metal overlying the semiconductor structure. The metal local interconnect is deposited without forming in intermediate insulating layer between the silicide and metal layers to define contact openings or vias. In some embodiments, titanium a suitable metal for formation of the local interconnect. Suitable selected regions for silicide layer formation include, for example, silicided source/drain (S/D) regions and silicided gate contact regions. The silicided regions form uniform structures for electrical coupling to underlying doped regions that are parts of one or more semiconductor devices. In integrated circuits in which an etchstop layer is desired for the patterning of the metal film, a first optional insulating layer is deposited prior to deposition of the metal film. In one example, the insulating layer is a silicon dioxide (oxide) layer that is typically less than 10 nm in thickness.
公开/授权文献
- USD384891S Combined bottle and cap 公开/授权日:1997-10-14
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