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US6097048A Dynamic random access memory cell suitable for integration with semiconductor logic devices 失效
适合与半导体逻辑器件集成的动态随机存取存储器

Dynamic random access memory cell suitable for integration with
semiconductor logic devices
Abstract:
A dynamic random access memory (DRAM) cell includes first and second MOS transistors, such as a PMOS transistor and NMOS transistor in a CMOS cell. One of the two transistors functions as a switch transistor while the other transistor is configured as a storage capacitor. The DRAM cell may be integrated into a logic device, such as a CMOS gate array, using PMOS and NMOS transistor cells formed in the gate array. In that case, the DRAM cell may be fabricated in a logic device with the standard processes used to produce the logic device.
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