- 专利标题: Semiconductor device and manufacturing method thereof
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申请号: US748896申请日: 1996-11-15
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公开(公告)号: US6104076A公开(公告)日: 2000-08-15
- 发明人: Yoshiaki Nakayama , Hiroshi Maeda , Makio Iida , Hiroshi Fujimoto , Mitsuhiro Saitou , Hiroshi Imai , Hiroyuki Ban
- 申请人: Yoshiaki Nakayama , Hiroshi Maeda , Makio Iida , Hiroshi Fujimoto , Mitsuhiro Saitou , Hiroshi Imai , Hiroyuki Ban
- 申请人地址: JPX Kariya
- 专利权人: Denso Corporation
- 当前专利权人: Denso Corporation
- 当前专利权人地址: JPX Kariya
- 优先权: JPX7-297148 19951115; JPX8-008699 19960122; JPX8-250299 19960920
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/8249 ; H01L27/02 ; H01L27/06 ; H01L27/085 ; H01L29/739 ; H01L29/78 ; H01L29/76 ; H01L23/58
摘要:
A semiconductor device including a reduced surface field strength type LDMOS transistor which can prevent the breakdown of elements at channel formation portions when a reverse voltage is applied to its drain. A P well and an N well are formed in an N-type substrate to produce a double-well structure, with a source electrode being set to be equal in electric potential to the N-type substrate. The drift region of the N well has a dopant concentration to satisfy the so-called RESURF condition, which can provide a high breakdown voltage a low ON resistance. When a reverse voltage is applied to a drain electrode, a parasitic bipolar transistor comprising the N well, the P well and the N-type substrate develops to form a current-carrying path toward a substrate, so that the element breakdown at the channel formation portions is avoidable at the application of the reverse voltage.
公开/授权文献
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