Invention Grant
US6105120A Method for implementing multiple format addressing in an embedded
microcontroller, a compiler being arranged for implementing the method,
and a microcontroller being arranged for using the method and compiler
失效
用于在嵌入式微控制器中实现多格式寻址的方法，用于实现该方法的编译器以及用于使用该方法和编译器的微控制器
- Patent Title: Method for implementing multiple format addressing in an embedded microcontroller, a compiler being arranged for implementing the method, and a microcontroller being arranged for using the method and compiler
- Patent Title (中): 用于在嵌入式微控制器中实现多格式寻址的方法，用于实现该方法的编译器以及用于使用该方法和编译器的微控制器
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Application No.: US935565Application Date: 1997-09-24
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Publication No.: US6105120APublication Date: 2000-08-15
- Inventor: Paulus M. H. M. A. Gorissen , Alexander Augusteijn , Eelco J. Dijkstra
- Applicant: Paulus M. H. M. A. Gorissen , Alexander Augusteijn , Eelco J. Dijkstra
- Applicant Address: NY New York
- Assignee: U.S. Philips Corporation
- Current Assignee: U.S. Philips Corporation
- Current Assignee Address: NY New York
- Priority: EPX97200203 19970128
- Main IPC: G06F9/34
- IPC: G06F9/34 ; G06F9/22 ; G06F9/318 ; G06F9/355 ; G06F9/45 ; G06F12/02 ; G06F12/06
Abstract:
Multiple format addressing is implemented in a microcontroller that has both ROM and RAM memory facility, processing facility, and bus facility for interconnecting the memory and processing facilities, through using a low address field for local addressing, and at least one facultative high address field for extended addressing. In particular, the high address field is provided in a first addressing format as a segment address, and in a second addressing format as containing a RAM/ROM selection bit. More in particular, the high address field can be provided in a third addressing format as containing a RAM/ROM selection bit and a segment address in respective mutually exclusive fields.
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