发明授权
US6118606A Apparatus for generating a signal whose phase is synchronized with an
inputted digital signal
失效
用于产生其相位与输入的数字信号同步的信号的装置
- 专利标题： Apparatus for generating a signal whose phase is synchronized with an inputted digital signal
- 专利标题（中）： 用于产生其相位与输入的数字信号同步的信号的装置
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申请号： US939679申请日： 1997-09-29
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公开(公告)号： US6118606A公开(公告)日： 2000-09-12
- 发明人: Yoshiyuki Sasaki , Shinichi Yamashita
- 申请人： Yoshiyuki Sasaki , Shinichi Yamashita
- 申请人地址： JPX
- 专利权人： Canon Kabushiki Kaisha
- 当前专利权人： Canon Kabushiki Kaisha
- 当前专利权人地址： JPX
- 优先权： JPX6-166741 19940719; JPX6-166742 19940719
- 主分类号： G11B20/14
- IPC分类号： G11B20/14 ; H03L7/091 ; H04N5/93 ; G11B5/09 ; G11B5/035
摘要：
A specific pattern in an inputted digital signal is detected and the input digital signal is sampled and held in accordance with such a detection output. A clock whose phase is synchronized with the input digital signal is generated on the basis of the sampling output. With such a construction as mentioned above, the phase of the clock can be optimally controlled by a simple construction. The clock can be precisely extracted from the input digital signal, so that the operation of a circuit is also stable.
公开/授权文献
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