发明授权
- 专利标题: Manufacturing method for a capacitor in an integrated storage circuit
- 专利标题(中): 集成存储电路中电容器的制造方法
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申请号: US312571申请日: 1999-05-14
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公开(公告)号: US6127220A公开(公告)日: 2000-10-03
- 发明人: Gerrit Lange , Martin Franosch , Volker Lehmann , Hans Reisinger , Herbert Schafer , Reinhard Stengl , Hermann Wendt
- 申请人: Gerrit Lange , Martin Franosch , Volker Lehmann , Hans Reisinger , Herbert Schafer , Reinhard Stengl , Hermann Wendt
- 申请人地址: DEX Munich
- 专利权人: Siemens Aktiengesellschaft
- 当前专利权人: Siemens Aktiengesellschaft
- 当前专利权人地址: DEX Munich
- 优先权: DEX19821776 19980514
- 主分类号: H01L21/8242
- IPC分类号: H01L21/8242 ; H01L27/108
摘要:
On a carrier a layer sequence is applied which contains alternatingly layers made of a first conducting material and a second material in which both materials are different from a carrier material. An opening is made in the layer sequence, which is filled with a conducting material so that a central supporting structure is produced. Then the layer sequence is structured corresponding to the dimensions of a capacitor and the layers made of the second material are removed selectively, so that a first capacitor electrode is formed. The layer sequence may have especially p.sup.+ -/p.sup.- silicon layers or silicon/germanium layers. An etch-stop layer can also be incorporated as the lowest or second-lowest layer.
公开/授权文献
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