发明授权
US6150729A Routing density enhancement for semiconductor BGA packages and printed
wiring boards
有权
半导体BGA封装和印刷电路板的路由密度增强
- 专利标题: Routing density enhancement for semiconductor BGA packages and printed wiring boards
- 专利标题(中): 半导体BGA封装和印刷电路板的路由密度增强
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申请号: US345432申请日: 1999-07-01
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公开(公告)号: US6150729A公开(公告)日: 2000-11-21
- 发明人: Farshad Ghahghahi
- 申请人: Farshad Ghahghahi
- 申请人地址: CA Milpitas
- 专利权人: LSI Logic Corporation
- 当前专利权人: LSI Logic Corporation
- 当前专利权人地址: CA Milpitas
- 主分类号: H01L23/498
- IPC分类号: H01L23/498 ; H05K1/11 ; H01L23/48 ; H01L23/52 ; H01L29/40
摘要:
A routing scheme for a multilayer printed wiring board or semiconductor package is disclosed. Each of a first group of electrical contacts such as bond pads is disposed on a first surface and is electrically coupled to one of a plurality of conductive surface connectors such as vias. Each of a second group of electrical contacts is disposed on the first surface and is routed by one of a second plurality of traces. Each of a plurality of short traces couple each of the bond pads in the first group with corresponding ones of the vias, which in turn are electrically coupled to one of a plurality of first traces on the second surface. The orientation between certain electrical contacts in the first group and their associated vias is different than the orientation between certain other electrical contacts in the first group and their associated vias. This varying orientation allows greater routing density on the second surface.
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