A method of forming a FET with an having a self-aligned pocket implant, comprising the following steps. A substrate is formed having a substrate dielectric layer thereon and a first oxide layer over the substrate dielectric layer. The first oxide layer having an upper surface. A trench is formed through the oxide layer, the substrate dielectric layer, and partially through the substrate. The trench having a bottom and side walls. A second oxide layer is formed along the bottom and said side walls of said trench within the substrate. A dopant is selectively ion implanted into the substrate is achieved to form lightly doped layers adjacent the side walls of the trench within the substrate. A self-aligned channel implant and a pocket implant are ion implanted at predetermined respective depths in the substrate below the trench bottom is achieved. Side-wall spacers on the side walls of the trench are then formed with the side-wall spacers each having a top surface below the upper surface of the first oxide layer. A gate dielectric layer is formed on the bottom of the trench between the side-wall spacers. A planarized gate electrode is formed that has an upper surface substantially coextensive with the upper surface of the first oxide layer. The first oxide layer and the substrate dielectric layer are removed. A dopant is ion implanted into the substrate to form heavily doped layers adjacent the side wall spacers.