发明授权
US06173419B2 Field programmable gate array (FPGA) emulator for debugging software 失效
用于调试软件的现场可编程门阵列(FPGA)仿真器

  • 专利标题: Field programmable gate array (FPGA) emulator for debugging software
  • 专利标题(中): 用于调试软件的现场可编程门阵列(FPGA)仿真器
  • 申请号: US09078872
    申请日: 1998-05-14
  • 公开(公告)号: US06173419B2
    公开(公告)日: 2001-01-09
  • 发明人: Philip C. Barnett
  • 申请人: Philip C. Barnett
  • 主分类号: G06F1100
  • IPC分类号: G06F1100
Field programmable gate array (FPGA) emulator for debugging software
摘要:
An emulator is used to debug software operating on a target micro-controller in a target circuit environment. The emulator contains a field programmable gate array that is programmed to contain an emulated target micro-controller and an emulated monitoring circuit which monitors the operations of the micro-controller. The emulated target micro-controller receives signals from the target circuit environment. The signals from the target circuit environment are communicated to the emulated target micro-controller by one or more channels, such as a data channel and a timing channel. The number of channels is limited so that signals from the target environment do not degrade the performance of the emulator. A host computer contains a software debug program which works with the emulated monitoring circuit to monitor the emulated micro-controller. The FIELD PROGRAMMABLE GATE ARRAY is programmed to have the characteristics of one or more types of memory, for example ROM, PROM and EEPROM to emulate the different types of memory.
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