- 专利标题: Method and apparatus for manufacturing a semiconductor integrated circuit
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申请号: US08457686申请日: 1995-06-01
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公开(公告)号: US06178972B2公开(公告)日: 2001-01-30
- 发明人: Shigeru Harada , Takashi Yamashita , Noriaki Fujiki , Tsutomu Tanaka
- 申请人: Shigeru Harada , Takashi Yamashita , Noriaki Fujiki , Tsutomu Tanaka
- 优先权: JP6-302377 19941206
- 主分类号: H01L21465
- IPC分类号: H01L21465
摘要:
A method and an apparatus for manufacturing a semiconductor integrated circuit in which semiconductor elements (2) and a wiring structure connecting the semiconductor elements (2) one another are located on a semiconductor substrate (1). In the method or apparatus, a series of wiring elements (4,6,7,9,10), each of which constructs the wiring structure is formed sequentially, then the semiconductor integrated circuit under manufacturing process is washed by neutral solution containing oxidant during the process of forming of the wiring elements (4,6,7,9,10).
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