发明授权
- 专利标题: Process for forming a high-K gate dielectric
- 专利标题(中): 用于形成高K栅极电介质的工艺
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申请号: US09571588申请日: 2000-05-17
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公开(公告)号: US06184072B2公开(公告)日: 2001-02-06
- 发明人: Vidya S. Kaushik , Bich-Yen Nguyen , Olubunmi O. Adetutu , Christopher C. Hobbs
- 申请人: Vidya S. Kaushik , Bich-Yen Nguyen , Olubunmi O. Adetutu , Christopher C. Hobbs
- 主分类号: H01L21336
- IPC分类号: H01L21336
摘要:
A method of processing a high K gate dielectric includes growing a high quality silicon dioxide layer at the silicon interface followed by deposition of a metal layer, which is then diffused into the silicon dioxide. Preferred metals include zirconium and hafnium. A gate stack may be fabricated by adding a metal containing layer to an existing thermally grown SiO2 or a combination of SiO2, SiO3 and SiO4 (oxide-nitride or oxynitride) stacks.
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