Disclosed is a delay circuit for delaying at least the timing of a rising edge or the timing of a falling edge of an input signal alternating between first and second levels. The delay circuit includes (1) a charge pump in which first and second field-effect transistors of different channels are serially connected; (2) a capacitor connected in parallel with the first field-effect transistor; (3) a charging current control circuit for passing a charging current into the capacitor via the second field-effect transistor of the charge pump when the input signal is at the first level; (4) a discharge current control circuit for releasing a discharge current from the capacitor via the first field-effect transistor when the input signal is at the second level; and (5) a discrimination circuit for outputting a signal of a prescribed logic level based upon a terminal voltage of the capacitor. The values of the charging current and discharge current of the capacitor are controlled to control the slope of the input voltage to the discrimination circuit, thereby adjusting the delay time.