A clock control circuit includes a forward pulse delay circuit including a plurality of delay circuits for delaying a forward pulse signal FCL, a backward pulse delay circuit including a plurality of delay circuits for delaying a backward pulse signal RCL, a state-hold section including a plurality of state-hold circuits for controlling the operation of the backward pulse delay circuit in accordance with the transmission condition of the forward pulse signal in the forward pulse delay circuit, and an input stop circuit for stopping inputting a pulse corresponding to an external clock signal to the backward pulse delay circuit during a predetermined period from the time point when the external clock signal begins to be supplied.