发明授权
- 专利标题: Self-aligned dual damascene arrangement for metal interconnection with oxide dielectric layer and low k dielectric constant layer
- 专利标题(中): 用于与氧化物介电层和低k介电常数层的金属互连的自对准双镶嵌布置
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申请号: US09238049申请日: 1999-01-27
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公开(公告)号: US06207577B1公开(公告)日: 2001-03-27
- 发明人: Fei Wang , Jerry Cheng , Darrell M. Erb
- 申请人: Fei Wang , Jerry Cheng , Darrell M. Erb
- 主分类号: H01L213065
- IPC分类号: H01L213065
摘要:
A method of forming a self-aligned dual damascene structure in a semiconductor device arrangement forms an oxide dielectric material over an underlying metal interconnect layer, such as a copper interconnect layer. A nitride etch stop layer is formed on the oxide dielectric layer, and a low k dielectric layer is formed on the nitride etch stop layer. A trench is etched into the low k dielectric layer, followed by the etching of a via into the oxide dielectric layer. The oxide dielectric material and low k dielectric material are selected so that they have different sensitivity to at least one etchant chemistry. Undercutting in the second dielectric layer caused by overetching is thereby prevented during the etching of the via in the second dielectric layer by employing an etch chemistry that etches only the oxide dielectric material and not the low k dielectric material.
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