发明授权
US06208170B1 Semiconductor integrated circuit having a sleep mode with low power and small area 有权
具有低功率和小面积的睡眠模式的半导体集成电路

  • 专利标题: Semiconductor integrated circuit having a sleep mode with low power and small area
  • 专利标题(中): 具有低功率和小面积的睡眠模式的半导体集成电路
  • 申请号: US09286029
    申请日: 1999-04-05
  • 公开(公告)号: US06208170B1
    公开(公告)日: 2001-03-27
  • 发明人: Hiroaki IwakiKouichi Kumagai
  • 申请人: Hiroaki IwakiKouichi Kumagai
  • 优先权: JP10-093245 19980406
  • 主分类号: H03K19094
  • IPC分类号: H03K19094
Semiconductor integrated circuit having a sleep mode with low power and small area
摘要:
A semiconductor integrated circuit includes a power supply circuit having a global source line VCC, a local source line QVCC coupled to VCC by a source switching transistor, and a global ground line VSS, a low-threshold logic (combinational) circuit connected between QVCC and VSS, and a data storage (sequential) circuit, connected between VCC and VSS. The data storage circuit includes a low-threshold input section for receiving data from the logic circuit and a high-threshold latch section for latching the data received by the input section. Mode switching transistors are inserted between the low-threshold logic circuit and VSS, between low-threshold input section and VCC and between the low-threshold input section and VSS, for effecting a sleep mode of the semiconductor integrated circuit. Low power dissipation is maintained with a reduced circuit scale.
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