发明授权
- 专利标题: Nonvolatile semiconductor memory device
- 专利标题(中): 非易失性半导体存储器件
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申请号: US09599397申请日: 2000-06-22
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公开(公告)号: US06208560B1公开(公告)日: 2001-03-27
- 发明人: Tomoharu Tanaka , Hiroshi Nakamura , Ken Takeuchi , Riichiro Shirota , Fumitaka Arai , Susumu Fujimura
- 申请人: Tomoharu Tanaka , Hiroshi Nakamura , Ken Takeuchi , Riichiro Shirota , Fumitaka Arai , Susumu Fujimura
- 优先权: JP9-124493 19970514; JP9-224922 19970821; JP9-340971 19971211; JP10-104652 19980415
- 主分类号: G11C1606
- IPC分类号: G11C1606
摘要:
A NAND cell unit comprising a plurality of memory cells which are connected in series. An erase operation is effected on all memory cells. Then, a soft-program voltage, which is opposite in polarity to the erase voltage applied in the erase operation, is applied to all memory cells, thereby setting all memory cells out of an over-erased state. Thereafter, a program voltage of 20 V is applied to the control gate of any selected one of the memory cells, 0 V is applied to the control gates of the two memory cells provided adjacent to the selected memory cell, and 11 V is applied to the control gates of the remaining memory cells. Data is thereby programmed into the selected memory cell. The time for which the program voltage is applied to the selected memory cell is adjusted in accordance with the data to be programmed into the selected memory cell. Hence, data “0” can be correctly programmed into the selected memory cell, multi-value data can be read from any selected memory cell at high speed.