According to one embodiment, an integrated circuit is disclosed that includes a plurality of functional unit blocks (FUBs), wherein each of the plurality of FUBs further includes a clock gated circuit and a clock gating circuit. The clock gating circuit immediately ungates clock signals to be received at the clock gated circuit whenever the clock gated circuit is to transition from an idle state to a non-idle state. According to a further embodiment, the clock gating circuit also immediately gates the clock signals whenever the clock gated circuit is to transition from a non-idle state to the idle state.