公开(公告)号：US06232820B1

公开(公告)日：2001-05-15

申请号：US09332764

申请日：1999-06-14

申请人： Kevin J. Long ,  Prasanna C. Shah

发明人： Kevin J. Long ,  Prasanna C. Shah

IPC分类号： H03K1704

CPC分类号： G06F1/3237 ,  G06F1/10 ,  G06F1/3203 ,  G06F7/00 ,  Y02D10/128

摘要： According to one embodiment, an integrated circuit is disclosed that includes a plurality of functional unit blocks (FUBs), wherein each of the plurality of FUBs further includes a clock gated circuit and a clock gating circuit. The clock gating circuit immediately ungates clock signals to be received at the clock gated circuit whenever the clock gated circuit is to transition from an idle state to a non-idle state. According to a further embodiment, the clock gating circuit also immediately gates the clock signals whenever the clock gated circuit is to transition from a non-idle state to the idle state.

摘要翻译： 根据一个实施例，公开了一种集成电路，其包括多个功能单元块（FUB），其中多个FUB中的每一个还包括时钟选通电路和时钟门控电路。 只要时钟门控电路从空闲状态转换到非空闲状态，时钟门控电路立即断开要在时钟门控电路接收的时钟信号。 根据另一实施例，每当时钟门控电路要从非空闲状态转换到空闲状态时，时钟选通电路也立即门控时钟信号。