发明授权
- 专利标题: Fast MOSFET with low-doped source/drain
- 专利标题(中): 具有低掺杂源极/漏极的快速MOSFET
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申请号: US09483400申请日: 2000-01-14
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公开(公告)号: US06238960B1公开(公告)日: 2001-05-29
- 发明人: Witold P. Maszara , Srinath Krishnan , Ming-Ren Lin
- 申请人: Witold P. Maszara , Srinath Krishnan , Ming-Ren Lin
- 主分类号: H01L21336
- IPC分类号: H01L21336
摘要:
A method (100) of forming a transistor (50, 80) includes forming a gate oxide (120) over a portion of a semiconductor material (56, 122) and forming a doped polysilicon film (124) having a dopant concentration over the gate oxide (122). Subsequently, the doped polysilicon film (124) is etched to form a gate electrode (52) overlying a channel region (58) in the semiconductor material (56, 122), wherein the gate electrode (52) separates the semiconductor material into a first region (60) and a second region (68) having the channel region (58) therebetween. The method (100) further includes forming a drain extension region (64) in the first region (60) and a source extension region (72) in the second region (68), and forming a drain region (62) in the first region (60) and a source region (70) in the second region (68). The source/drain formation is such that the drain and source regions (62, 70) have a dopant concentration which is less than the polysilicon film (124) doping concentration. The lower doping concentration in the source/drain regions (62, 70) lowers the junction capacitance and provides improved control of floating body effects when employed in SOI type processes.
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