发明授权
- 专利标题: Self-timing control circuit
- 专利标题(中): 自定时控制电路
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申请号: US09325555申请日: 1999-06-04
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公开(公告)号: US06239635B1公开(公告)日: 2001-05-29
- 发明人: Yasurou Matsuzaki
- 申请人: Yasurou Matsuzaki
- 优先权: JP10-190227 19980706; JP11-110478 19990419
- 主分类号: H03L700
- IPC分类号: H03L700
摘要:
A self-timing control circuit relating to the present invention comprises a clock cycle counting circuit for counting ocillation pulses during a period corresponding to a cycle of the master clock and generating a clock cycle count value. The count value for a period corresponding to the cycle of the master clock is calculated with this clock cycle counting circuit. The self-timing control circuit further comprises a control clock generating portion for generating the control clock, as timed by synchronizing with the master clock, starting a count of the oscillation pulses, and counting up to the clock cycle count value. As a result, the control clock generated is delayed from the master clock by the time taken to count to the measured count value. The timing of the control clock is delayed from the master clock by one cycle or an integer multiple thereof.