发明授权
US06243292B1 Nonvolatile semiconductor memory device capable of reducing memory array area
有权
能够减少存储器阵列区域的非易失性半导体存储器件
- 专利标题： Nonvolatile semiconductor memory device capable of reducing memory array area
- 专利标题（中）： 能够减少存储器阵列区域的非易失性半导体存储器件
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申请号： US09613691申请日： 2000-07-10
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公开(公告)号： US06243292B1公开(公告)日： 2001-06-05
- 发明人: Shinichi Kobayashi , Yoshikazu Miyawaki , Shinji Kawai , Tomoshi Futatsuya
- 申请人： Shinichi Kobayashi , Yoshikazu Miyawaki , Shinji Kawai , Tomoshi Futatsuya
- 优先权： JP12-018547 20000127
- 主分类号： G11C700
- IPC分类号： G11C700
摘要：
A memory cell array is divided into a plurality of memory cell blocks each collectively subjected to an erasing operation as a unit. A P well regions for memory cell transistors and an N well region for electrically separating the P well regions are provided. Select transistors are formed in the same P well region as the memory cell transistor connected to the corresponding sub bit line of P well regions.
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