发明授权
US06243664B1 Methods for maximizing routability in a programmable interconnect matrix having less than full connectability
有权
在具有小于完全可连接性的可编程互连矩阵中最大化可路由性的方法
- 专利标题: Methods for maximizing routability in a programmable interconnect matrix having less than full connectability
- 专利标题(中): 在具有小于完全可连接性的可编程互连矩阵中最大化可路由性的方法
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申请号: US09181084申请日: 1998-10-27
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公开(公告)号: US06243664B1公开(公告)日: 2001-06-05
- 发明人: Hagop A. Nazarian , Stephen M. Douglass , W. Alfred Graf , S. Babar Raza , Sundar Rajan , Shiva Sorooshian Borzin , Darren Neuman
- 申请人: Hagop A. Nazarian , Stephen M. Douglass , W. Alfred Graf , S. Babar Raza , Sundar Rajan , Shiva Sorooshian Borzin , Darren Neuman
- 主分类号: G06F15173
- IPC分类号: G06F15173
摘要:
Methods for designing a programmable interconnect matrix having reduced connectivity to achieve maximum routability for the reduced connectivity. An array of multiplexors, each having a multiplexor width wmux that is less than number of input conductors for the programmable matrix, are coupled to the input conductors of the programmable interconnect matrix such that the number of input signals shared between any two multiplexors is less than the multiplexor width wmux and such that each input signal has approximately the same number of chances to route. To better ensure the successful routing of input signals by a programmable interconnect matrix designed according to the present methods, improved routing methods are also described. According to a first embodiment, routing is accomplished by swapping successfully routed input signals with a blocked input signal and determining whether the input signal that has been swapped out may be routed through available multiplexors. According to a second embodiment, a predictive swapping technique is used whereby successfully routed signals qualified to provide a blocked signal with a route are first checked to determine whether a successful routing will be provided before swapping in the blocked output signal.
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