Invention Grant
US06245670B1 Method for filling a dual damascene opening having high aspect ratio to minimize electromigration failure 有权
用于填充具有高纵横比的双镶嵌开口的方法以最小化电迁移故障

  • Patent Title: Method for filling a dual damascene opening having high aspect ratio to minimize electromigration failure
  • Patent Title (中): 用于填充具有高纵横比的双镶嵌开口的方法以最小化电迁移故障
  • Application No.: US09253480
    Application Date: 1999-02-19
  • Publication No.: US06245670B1
    Publication Date: 2001-06-12
  • Inventor: Robin CheungSergey Lopatin
  • Applicant: Robin CheungSergey Lopatin
  • Main IPC: H01L214763
  • IPC: H01L214763
Method for filling a dual damascene opening having high aspect ratio to minimize electromigration failure
Abstract:
A method for effectively filling a dual damascene opening having a via hole and a trench that are contiguous openings uses a two step deposition process. The method includes a step of filling the via hole by electroless deposition of a first conductive material into the via hole. A second conductive material is at a bottom wall of the via hole, and the second conductive material at the bottom wall of the via hole acts as an autocatalytic surface during the electroless deposition of the first conductive material within the via hole. The method also includes the step of depositing a seed layer of a third conductive material to cover walls of the trench and includes the step of filling the trench by electroplating deposition of the third conductive material from the seed layer into the trench. The present invention may be used to particular advantage for small geometry integrated circuits when the conductive material filling the via hole and the trench is copper. By first filling the via hole using electroless deposition, void formation and poor via contact is prevented. In addition, the more widely available and easily manufacturable electroplating deposition process is still used for filling the trench.
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