A resistor network for terminating active electronic circuits such as stub series terminated logic and emitter coupled logic circuits. The network has a substrate with top and bottom surfaces and a common via extending through the substrate. Several resistor pairs are located on the first surface surrounding the common via. Each resistor pair has first and second vias. Resistors are connected between the first and second vias. Several solder spheres are located on the bottom surface. Each of the solder spheres are electrically connected to one of the first, second or common vias.