发明授权
- 专利标题: Low cost method of fabricating transient voltage suppressor semiconductor devices or the like
- 专利标题(中): 制造瞬态电压抑制半导体器件等的低成本方法
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申请号: US09103731申请日: 1998-06-24
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公开(公告)号: US06248651B1公开(公告)日: 2001-06-19
- 发明人: Jack Eng , Joseph Chan , Gregory Zakaluk , John Amato , Dennis Garbis
- 申请人: Jack Eng , Joseph Chan , Gregory Zakaluk , John Amato , Dennis Garbis
- 主分类号: H01L21225
- IPC分类号: H01L21225
摘要:
Transient voltage suppressor semiconductor devices and other semiconductor devices having rigorous requirements for the diffusion and depth of impurities to produce P-N junctions can be fabricated at surprisingly low costs without sacrifice of functional characteristics by subjecting the substrate to a grinding process resulting in a surface short of polishing perfection, thereby to eliminate the time-consuming and hence costly conventional polishing operation, and then diffusing the desired impurity into the substrate from a solid impurity source.
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