A peripheral device connecting system with priority arbitration includes a connection matrix connected to a plurality of peripheral devices capable of transmitting a signal to be arbitrated, e.g., an interrupt enable signal. The connection matrix includes first and second connection matrices connected to each other through a plurality of logic gates having a progressive number of inputs for transmitting in parallel a plurality of signals to be arbitrated. A connection matrix for a microcontroller-emulating chip includes a peripheral device connecting system with priority arbitration.