发明授权
- 专利标题: Configuration bus interface circuit for FPGAS
- 专利标题(中): 用于FPGAS的配置总线接口电路
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申请号: US09374471申请日: 1999-08-13
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公开(公告)号: US06262596B1公开(公告)日: 2001-07-17
- 发明人: David P. Schultz , Lawrence C. Hung , F. Erich Goetting
- 申请人: David P. Schultz , Lawrence C. Hung , F. Erich Goetting
- 主分类号: H03K19177
- IPC分类号: H03K19177
摘要:
A bus interface circuit for a programmable logic device (PLD) including an interface multiplexer connected between two or more external communication circuits and a configuration memory array. The interface multiplexer coordinates communication between a selected one of the external communication circuits and a packet processor. The packet processor interprets command/data information transmitted in a bit stream from the selected external communication circuit. In a default state, the interface multiplexer connects dual-purpose input/output pins of the PLD to the packet processor. In an alternative state, the interface multiplexer connects a JTAG interface circuit to the packet processor to facilitate configuration operations through the JTAG pins of the PLD.