Invention Grant
US06268245B1 Method for forming a DRAM cell with a ragged polysilicon crown-shaped capacitor 有权
用不规则的多晶硅冠状电容器形成DRAM单元的方法

  • Patent Title: Method for forming a DRAM cell with a ragged polysilicon crown-shaped capacitor
  • Patent Title (中): 用不规则的多晶硅冠状电容器形成DRAM单元的方法
  • Application No.: US09298927
    Application Date: 1999-04-22
  • Publication No.: US06268245B1
    Publication Date: 2001-07-31
  • Inventor: Shye-Lin Wu
  • Applicant: Shye-Lin Wu
  • Main IPC: H01L218242
  • IPC: H01L218242
Method for forming a DRAM cell with a ragged polysilicon crown-shaped capacitor
Abstract:
In the preferred embodiment for forming a ragged polysilicon crown-shaped capacitor of a dynamic random access memory cell, a first dielectric layer is formed on a semiconductor substrate. A portion of the first dielectric layer is removed to define a contact hole within the first dielectric layer, wherein the contact hole is extended down to a source region in the substrate. Next, a conductive plug is formed and communicated to the source region within the contact hole. A second dielectric layer is formed on the first dielectric layer and the conductive plug, and a third dielectric layer is formed on the second dielectric layer. Next, portions of the third dielectric layer and the second dielectric layer are removed to define a storage node opening, wherein the storage node opening is located over the conductive plug. A first conductive layer is then formed to conformably cover the inside surface of the storage node opening and on the third dielectric layer. A fourth dielectric layer is formed on the first conductive layer and the substrate is planarized to the surface of the third dielectric layer. The fourth dielectric layer and the third dielectric layer are then removed to leave a storage node which is composed of the first conductive layer. Finally, a fifth dielectric layer is formed on the storage node, and a second conductive layer is then formed on the fifth dielectric layer to finish the capacitor structure.
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