发明授权
US06268263B1 Method of forming a trench type element isolation in semiconductor substrate 失效
在半导体衬底中形成沟槽型元件隔离的方法

  • 专利标题: Method of forming a trench type element isolation in semiconductor substrate
  • 专利标题(中): 在半导体衬底中形成沟槽型元件隔离的方法
  • 申请号: US09196134
    申请日: 1998-11-20
  • 公开(公告)号: US06268263B1
    公开(公告)日: 2001-07-31
  • 发明人: Maiko SakaiTakashi KuroiKatsuyuki Horita
  • 申请人: Maiko SakaiTakashi KuroiKatsuyuki Horita
  • 优先权: JPP10-162313 19980610
  • 主分类号: H01L2176
  • IPC分类号: H01L2176
Method of forming a trench type element isolation in semiconductor substrate
摘要:
A trench (21) is formed in a silicon substrate (1) on which an underlying oxide film (2) and a silicon nitride film (3) are formed. Then, a silicon oxide (11) is deposited by an HDP-CVD method to fill the trench (21) with the oxide. Further, a resist (41) including a second resist portion (42), and a resist (43) are formed. The silicon oxide film (11) that is not covered with the resists (41) and (43), is removed by dry etching. Etch selectivity of the silicon oxide film (11) to the stopper film (3) is not less than a value (2(c−a)/d) obtained by dividing twice a value (c−a) which is obtained by subtracting an alignment margin (a) from the maximum film thickness (c) of the silicon oxide film (11), by the film thickness (d) of the stopper film (3). The resists (41) and (43) are then removed, and the residual silicon oxide film (11B, 11DC, 11DE, 11FE) is polished and removed by the CMP method. This forms a trench type element isolation with no depression at its edge portion.
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