A new process is provided to create openings and interconnect patterns for the dual damascene structure. Four layers of dielectric are sequentially deposited over a pattern of interconnect metal. The via hole pattern is defined, the interconnect line pattern is next defined. The via pattern is etched though the upper layer of dielectric and through the stop layer. Only one etch processing step is used to create the desired vias and the desired interconnect line pattern. After the interconnect patterns and vias have been created in the four layers of dielectric, a barrier layer is blanket deposited, the metal is deposited for the dual damascene structure and the interconnect line pattern and polished.