发明授权
- 专利标题: Method of dividing a wafer and method of manufacturing a semiconductor device
- 专利标题(中): 分割晶片的方法和制造半导体器件的方法
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申请号: US09499466申请日: 2000-02-07
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公开(公告)号: US06294439B1公开(公告)日: 2001-09-25
- 发明人: Shigeo Sasaki , Shinya Takyu , Keisuke Tokubuchi , Koichi Yazima , Hideo Nakayoshi
- 申请人: Shigeo Sasaki , Shinya Takyu , Keisuke Tokubuchi , Koichi Yazima , Hideo Nakayoshi
- 优先权: JP9-197291 19970723
- 主分类号: H01L2146
- IPC分类号: H01L2146
摘要:
Grooves are formed in a surface of a wafer, on which semiconductor elements are formed, along dicing lines or chip parting lines on the wafer. The grooves are deeper than the thickness of a finished chip, and each of them has a curved bottom surface. A holding sheet is attached on the surface of the wafer on which the semiconductor elements are formed. Subsequently, the rear surface of the wafer is lapped and polished to the thickness of the finished chip, thereby dividing the wafer into chips. Even after the wafer is divided into the chips, the lapping and polishing is continued until the thickness of the wafer becomes equal to the thickness of the finished chip. The lapping and polishing amount required to attain the thickness of the finished chip after the lapped face of the wafer reaches the bottom surface of the groove, and a depth of a region of the curved bottom surface of the groove define a ratio of not less than 0.3.
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