发明授权
- 专利标题: Process for forming a bit-line in a MONOS device
- 专利标题(中): 在MONOS设备中形成位线的过程
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申请号: US09426743申请日: 1999-10-25
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公开(公告)号: US06297143B1公开(公告)日: 2001-10-02
- 发明人: David K. Foote , Bharath Rangarajan , Fei Wang , Steven K. Park
- 申请人: David K. Foote , Bharath Rangarajan , Fei Wang , Steven K. Park
- 主分类号: H01L214763
- IPC分类号: H01L214763
摘要:
A process for fabricating a MONOS device having a buried bit-line includes providing a semiconductor substrate and forming a mask layer overlying the semiconductor substrate. Thereafter, an etch process is performed to form a trench in the semiconductor substrate. Next, the mask layer is removed and the trench in the semiconductor substrate is filled with a silicon oxide layer. To form a bit-line oxide layer, a planarization process is utilized to planarize the silicon oxide layer and form a planar surface continuous with an upper surface of the semiconductor substrate.
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