发明授权
- 专利标题: Self aligned channel implantation
- 专利标题(中): 自对准通道植入
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申请号: US09418181申请日: 1998-12-28
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公开(公告)号: US06297530B1公开(公告)日: 2001-10-02
- 发明人: Hiroyuki Akatsu , Yujun Li , Jochen Beintner
- 申请人: Hiroyuki Akatsu , Yujun Li , Jochen Beintner
- 主分类号: H01L2976
- IPC分类号: H01L2976
摘要:
A short channel insulated gate field effect transistor has within the semiconductor body that houses the transistor a buried layer of the same conductivity type as the body but of higher impurity concentration. The buried layer is below the channel region and essentially extends only the distance between the drain and source regions of the transistor. The process to form the device provides high concentration in the region under the gate to suppress lateral depletion region expansion, while keeping a gradual junction in the vertical direction.
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