发明授权
US06297757B1 Method and circuit for testing an analog-to-digital converter module on a data processing system having an intermodule bus
有权
用于在具有模块间总线的数据处理系统上测试模拟 - 数字转换器模块的方法和电路
- 专利标题： Method and circuit for testing an analog-to-digital converter module on a data processing system having an intermodule bus
- 专利标题（中）： 用于在具有模块间总线的数据处理系统上测试模拟 - 数字转换器模块的方法和电路
-
申请号： US09248551申请日： 1999-02-11
-
公开(公告)号： US06297757B1公开(公告)日： 2001-10-02
- 发明人: Jules D. Campbell, Jr. , Jiang Chen , Robert S. Jones, III , Christian Ahrens , Scott Willard Herrin
- 申请人： Jules D. Campbell, Jr. , Jiang Chen , Robert S. Jones, III , Christian Ahrens , Scott Willard Herrin
- 主分类号： H03M106
- IPC分类号： H03M106
摘要：
A data processing system (20) includes a plurality of modules (44, 48) and an analog-to-digital converter (ADC) (46). The ADC (46) includes at least one port terminal (66) for transmitting test information from the ADC (46). The plurality of modules (44,48) and the ADC (46) are coupled to a central processing unit (CPU) (22) via an intermodule bus (42). A tester can exchange test information with the ADC (46) directly through the port terminal (66) instead of using the intermodule bus (42). Also, various sub-modules (62, 64, 60, 74) of the ADC (46) can be independently tested without performing a conversion process.
信息查询
