发明授权
US06319804B1 Process to separate the doping of polygate and source drain regions in dual gate field effect transistors
失效
在双栅场效应晶体管中分离多晶硅栅极和源极漏极区域的掺杂过程
- 专利标题: Process to separate the doping of polygate and source drain regions in dual gate field effect transistors
- 专利标题(中): 在双栅场效应晶体管中分离多晶硅栅极和源极漏极区域的掺杂过程
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申请号: US08624910申请日: 1996-03-27
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公开(公告)号: US06319804B1公开(公告)日: 2001-11-20
- 发明人: David Greenlaw , Scott Luning
- 申请人: David Greenlaw , Scott Luning
- 主分类号: H01L2102
- IPC分类号: H01L2102
摘要:
The present invention is directed toward a method for independently doping the gate and the source-drain regions of a semiconductor device. The method is initiated by the provision. of a substrate having isolation regions and a thin insulating layer. Over the substrate is formed a polysilicon layer which is doped with a first type of dopant at a first doping level. Over the polysilicon layer is formed a conducting layer of material that can withstand temperatures of 1000° C., and over the conducting layer is formed a blocking layer. The polysilicon layer, the conducting layer and the blocking layer are etched to form a gate stack. Source-drain regions are subsequently doped with a second type of dopant at a second doping level. Source-drain regions are activated in a 1000° C. heat cycle, and, subsequently, TiSi2 is formed on the source-drain regions. Contacts are then formed. The blocking layer on the gate stack need not be removed, which aids in minimizing substrate damage and in prevention of shorting a source-drain contact region to the substrate.
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