发明授权
US06334167B1 System and method for memory self-timed refresh for reduced power consumption 有权
用于内存自定时刷新的系统和方法,以降低功耗

System and method for memory self-timed refresh for reduced power consumption
摘要:
A memory controller, upon detecting an interval of inactivity (that is, no read or write access from a processor or I/O devices with respect to main storage or memory SDRAMs) halts external refresh commands from the processor, and initiates STR mode in main storage to preserve data contents in the memory SDRAMs and to save energy. Then, upon detecting a read or write operation, the memory controller signals main storage to exit STR mode.
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