To realize image conversion processing by means of filtering using a multi-tap structure without requiring that a memory to use has a high-speed capability, a merge circuit 102 merges sampled input image signals for every plurality pieces of continuous pixel data and outputs signals, and a memory element 103 stores approximately one frame of output data from the merge circuit 102. The memory element 103 outputs signals to a memory element 104 in accordance with outputs from a memory element 107 which stores control data which are calculated in advance. The memory element 104 stores a larger number of input signals received from the memory element 103 than the number of taps of a filtering circuit 106, and outputs signals to a selection circuit 105. The selection circuit 105 selects signals required by the filtering circuit 106 from input signals received from the memory element 104 and outputs signals to the filtering circuit 106. The filtering circuit 106 generates output image signals, using input signals received from the selection circuit 105.