发明授权
US06350652B1 Process for manufacturing nonvolatile memory cells with dimensional control of the floating gate regions
有权
用于制造具有浮动栅极区域的尺寸控制的非易失性存储单元的工艺
- 专利标题: Process for manufacturing nonvolatile memory cells with dimensional control of the floating gate regions
- 专利标题(中): 用于制造具有浮动栅极区域的尺寸控制的非易失性存储单元的工艺
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申请号: US09587214申请日: 2000-06-01
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公开(公告)号: US06350652B1公开(公告)日: 2002-02-26
- 发明人: Giovanna Dalla Libera , Bruno Vajana , Matteo Patelmo
- 申请人: Giovanna Dalla Libera , Bruno Vajana , Matteo Patelmo
- 优先权: EP98830644 19981023; EP99830347 19990604
- 主分类号: H01L21336
- IPC分类号: H01L21336
摘要:
A manufacturing process including: forming a first insulating region on top of an active area; forming a tunnel region at the side of the first insulating region; depositing and defining a semiconductor material layer using a floating gate mask to form a floating gate region. The floating gate mask has an opening with an internal delimiting side extending at a preset distant from a corresponding outer delimiting side of the mask, so that the floating gate region forms inner a hole, and the tunnel region is defined, as regards its length, by the floating gate ask alone. The hole is filled with a dielectric material layer. The surface of the floating gate region is planarized, and an insulating region of dielectric material is made. A control gate region and conductive regions in the active area are then formed.