发明授权
US06363447B1 Apparatus for selectively encoding bus grant lines to reduce I/O pin requirements
有权
用于选择性地编码总线授权线以减少I / O引脚要求的装置
- 专利标题: Apparatus for selectively encoding bus grant lines to reduce I/O pin requirements
- 专利标题(中): 用于选择性地编码总线授权线以减少I / O引脚要求的装置
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申请号: US09332279申请日: 1999-06-12
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公开(公告)号: US06363447B1公开(公告)日: 2002-03-26
- 发明人: Douglas A. Larson
- 申请人: Douglas A. Larson
- 主分类号: G06F1336
- IPC分类号: G06F1336
摘要:
One embodiment of the present invention provides an apparatus that selectively encodes bus grant lines to reduce I/O pin requirements. This apparatus includes a semiconductor chip with bus arbitration circuit. A number of grant lines emanate from the bus arbitration circuit. An encoder circuit encodes the grant lines into a smaller number of encoded grant lines. A selector circuit selects outputs from between the encoded grant lines and a first subset of grant lines. These outputs pass through output pins off of the semiconductor chip. During a first mode of operation, the first subset of grant lines is driven through the plurality of output pins. During a second mode of operation, the encoded grant lines are driven through the output pins. A variation on the above embodiment includes a number of bus request lines, which are divided into a first subset and a second subset. The first subset of request lines feeds through a number of input pins into the bus arbitration circuit. During the first mode of operation, the second subset of request lines feeds from off of the semiconductor chip through a number of I/O pins and bi-directional buffers into the bus arbitration circuit. During the second mode of operation, the second subset of grant lines feeds from the bus arbitration circuit, through the bi-directional buffers and I/O pins and off of the semiconductor chip.
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