发明授权
- 专利标题： Method and apparatus for managing input/output address accesses
- 专利标题（中）： 用于管理输入/输出地址访问的方法和装置
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申请号： US09495282申请日： 2000-01-31
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公开(公告)号： US06370598B2公开(公告)日： 2002-04-09
- 发明人: Andrew Martwick
- 申请人： Andrew Martwick
- 主分类号： G06F1324
- IPC分类号： G06F1324
摘要：
An apparatus includes an input/output (I/O) address verification unit that determines whether an I/O address received from a processor is protected. An interrupt generator is coupled to the I/O address verification unit. The interrupt generator generates an interrupt if the I/O address is protected. An interrupt recorder is coupled to the address verification unit. The interrupt recorder records a cause of the interrupt.
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