发明授权
US06372619B1 Method for fabricating wafer level chip scale package with discrete package encapsulation 有权
用分立封装封装制造晶圆级芯片级封装的方法

  • 专利标题: Method for fabricating wafer level chip scale package with discrete package encapsulation
  • 专利标题(中): 用分立封装封装制造晶圆级芯片级封装的方法
  • 申请号: US09918085
    申请日: 2001-07-30
  • 公开(公告)号: US06372619B1
    公开(公告)日: 2002-04-16
  • 发明人: Chender HuangPei-Hwa Tsao
  • 申请人: Chender HuangPei-Hwa Tsao
  • 主分类号: H01L2128
  • IPC分类号: H01L2128
Method for fabricating wafer level chip scale package with discrete package encapsulation
摘要:
A method for fabricating a wafer level chip scale package with discrete package encapsulation and devices formed by the method are described. A dry film photoresist layer is first deposited on top of a pre-processed wafer complete with a plurality of bond pads and an I/O redistribution metal layer. The dry film photoresist layer is then patterned to form a plurality of trench openings and a plurality of via openings followed by the process of depositing a liquid photoresist material into the plurality of trench openings and plating a conductive metal into the plurality of via openings to form via plugs. After the dry film photoresist layer is removed, an encapsulant layer is printed on top of the wafer to embed the protrusions formed by the liquid photoresist material and the via plugs.
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