发明授权
- 专利标题: Tape ball grid array semiconductor
- 专利标题(中): 磁带阵列阵列半导体
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申请号: US09373535申请日: 1999-08-13
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公开(公告)号: US06380620B1公开(公告)日: 2002-04-30
- 发明人: Shinji Suminoe , Kenji Toyosawa , Yasuaki Isobe
- 申请人: Shinji Suminoe , Kenji Toyosawa , Yasuaki Isobe
- 优先权: JP10-246215 19980831
- 主分类号: H01L2310
- IPC分类号: H01L2310
摘要:
An inner lead and an outer lead are formed only on an insulating tape. A semiconductor chip and the inner lead are connected by the flip chip method by providing an anisotropic conductive material therebetween. A radiating plate is bonded to the insulating tape with use of an adhesive so that the radiating plate covers all regions where solder balls connected with the outer leads are formed. Unlike the TAB type, the inner lead is not uncovered with the insulating tape, whereby deformation of the inner lead is suppressed as much as possible. With this arrangement, the following effect can be achieved. Namely, in a semiconductor device of the BGA type, heat generated during package manufacture can be efficiently emitted, and hence package defects caused by heat and stress during manufacture can be suppressed. As a result, smaller and thinner packages can be manufactured, while pitch narrowing and multiple-port structure can be achieved.
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