The present invention relates to a method, apparatus and system for managing virtual memory, in which a co-processor (224) is adapted to use virtual memory with a host processor (202). A host memory (203) is coupled to the host processor (202) to implement the virtual memory. The co-processor (224) includes a virtual-physical memory mapping device (915) for interrogating a virtual memory table and for mapping one or more virtual memory addresses (880) requested by the co-processor (224) into corresponding physical addresses (873) in the host memory (203). The virtual memory table is stored in two or more non-contiguously addressable regions of the host memory (203), and is preferably a page table. The memory mapping device (915) further includes a multiple-entry translation lookaside buffer (889) for caching virtual-to-physical address mappings (872), where entries in the buffer (889) are replaced on a least recently used replacement basis. The memory mapping device (915) also includes devices (901) for comparing, replacing, singly invalidating and multiply invalidating one or more entries of the translation lookaside buffer (889). It also includes a hashing device (892) for, upon an occurrence of a miss in the translation lookaside buffer (889), hashing a virtual memory address (880) using a hash function to produce an index into the virtual memory table.