发明授权
- 专利标题: Planar and densely patterned silicon-on-insulator structure
- 专利标题(中): 平面和密集图案的绝缘体上硅结构
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申请号: US09708337申请日: 2000-11-08
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公开(公告)号: US06404014B1公开(公告)日: 2002-06-11
- 发明人: Effendi Leobandung , Devendra K. Sadana , Dominic J. Schepis , Ghavam Shahidi
- 申请人: Effendi Leobandung , Devendra K. Sadana , Dominic J. Schepis , Ghavam Shahidi
- 主分类号: H01L2701
- IPC分类号: H01L2701
摘要:
A planar silicon-on-insulator (SOI) structure and a process for fabricating the structure. The SOI structure has a silicon wafer, an oxide layer, and a silicon layer. Trenches are formed, extending from the top surface of the structure to the silicon wafer, and are filled with a semiconductor. The trenches have a top, a bottom, and side walls. The side walls have side-wall silicon portions. The side-wall silicon portions of the trench side walls are covered by trench side-wall oxide layers. A protective side wall extends over the trench side walls and trench side-wall oxide layers from the trench top to the trench bottom.
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