发明授权
US06404236B1 Domino logic circuit having multiplicity of gate dielectric thicknesses 有权
具有多个栅介质厚度的多米诺逻辑电路

Domino logic circuit having multiplicity of gate dielectric thicknesses
摘要:
A domino logic circuit having a clocked precharge is disclosed. The domino logic circuit includes a precharge transistor, an isolation transistor, and multiple evaluate transistors. Connected to a power supply, the precharge transistor receives a clock input. The isolation transistor is connected to ground and also receives the clock input. Each of the input transistors, which are coupled between the precharge transistor and the isolation transistor, receives a signal input. The gate dielectric thickness of the evaluate transistors is less than the gate dielectric thickness of the precharge transistor.
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