发明授权
US06404254B2 Latch circuit and semiconductor integrated circuit having the latch circuit with control signal having a large voltage amplitude 失效
具有锁存电路的锁存电路和半导体集成电路具有电压振幅较大的控制信号

  • 专利标题: Latch circuit and semiconductor integrated circuit having the latch circuit with control signal having a large voltage amplitude
  • 专利标题(中): 具有锁存电路的锁存电路和半导体集成电路具有电压振幅较大的控制信号
  • 申请号: US09166585
    申请日: 1998-10-06
  • 公开(公告)号: US06404254B2
    公开(公告)日: 2002-06-11
  • 发明人: Hiroaki IwakiKouichi KumagaiSusumu Kurosawa
  • 申请人: Hiroaki IwakiKouichi KumagaiSusumu Kurosawa
  • 优先权: JP9-272287 19971006
  • 主分类号: H03K3286
  • IPC分类号: H03K3286
Latch circuit and semiconductor integrated circuit having the latch circuit with control signal having a large voltage amplitude
摘要:
A semiconductor integrated circuit so configured to stop the supplying of an electric power to a logic circuit in a standby mode, thereby to realize a low power consumption, includes a latch circuit characterized in that as the control signal a clock signal is supplied in the active mode, and a signal for creating an information hold condition is supplied in the standby mode, and in that MOSFETs applied with a control signal include a first conductivity type MOSFET having a high threshold and a second conductivity type MOSFET having a low threshold, a voltage amplitude of the control signal being larger than a power supply voltage. The semiconductor integrated circuit can be realized in that the high speed operation in the active mode and the low power consumption in the standby mode are compatible with each other, and it is sufficient if a power switch for the logic circuit is inserted at only either of the high level power supply voltage line side and the low level power supply voltage line side. In addition, the control signals are very few, and a fine timing control for changing over the mode is no longer required.
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