In a chip device in which not only an electrode pattern 25 is provided on a main mounting surface 21a of a base 21 but also bump electrodes 22 are provided as external electrodes for face-down mounting, an electrically insulating layer 31 is provided to be put on at least a part of the main mounting surface 21a so as to remain edge portions which do not cover at least a part of the electrode pattern 25, and a protection layer 32 for protecting the main mounting surface is further provided at a distance from the main mounting surface 21a so as to be put on the electrically insulating layer 31, so that the bump electrodes 22 are connected to the electrode pattern 25 while being in contact with the edge portions of the electrically insulating layer 31 and the protection layer 32.