The first switching circuit selects data of a predetermined bit from the input/output data in accordance with each of a plurality of testing modes and outputs the selected data as testing data. The second switching circuits receive the testing data and each bit of the input/output data, and select one of the input/output data and the testing data in accordance with the operation mode. In detail, each bit of the input/output data is respectively outputted to the memory cells during normal operation mode, and during testing mode the testing data is selected to be outputted to the memory cells as the common input/output data. Thus, write control for multiple kinds of data compressing test can be performed by using the simple first and second switching circuits. As a result, the control circuit for the data compressing test can be reduced in layout size.