发明授权
US06425091B1 Method and apparatus for tolerating scheduling latency and achieving time alignment for transmit and receive signals in high-speed modems implemented on host processors
有权
用于容忍调度等待时间并实现主机处理器上实现的高速调制解调器中的发送和接收信号的时间对准的方法和装置
- 专利标题： Method and apparatus for tolerating scheduling latency and achieving time alignment for transmit and receive signals in high-speed modems implemented on host processors
- 专利标题（中）： 用于容忍调度等待时间并实现主机处理器上实现的高速调制解调器中的发送和接收信号的时间对准的方法和装置
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申请号： US09243745申请日： 1999-02-03
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公开(公告)号： US06425091B1公开(公告)日： 2002-07-23
- 发明人: Jian Yang , Venkatraman Gopal Krishnan
- 申请人： Jian Yang , Venkatraman Gopal Krishnan
- 主分类号： G06F104
- IPC分类号： G06F104
摘要：
The preferred embodiment of the present invention provides a method and apparatus for dealing with scheduling latency in high-speed modems (100) implemented on host processors (101). With the present invention, high scheduling latency of the host operating system (135) is tolerated without incurring large end-to-end transmission delay. In addition, time alignment between downstream and upstream signals (175, 180) is achieved even though the scheduling delay may be large and varying.
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